Part Number Hot Search : 
IRF640FP SS6734G IRF640FP SS6734G KRA555E KRA555E MAZD043 HER803
Product Description
Full Text Search
 

To Download M35053-XXXFP Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DESCRIPTION
The M35053-XXXSP/FP is TV screen display control IC which can be used to display information such as number of channels, the date and messages and program schedules on the TV screen. In particular, owing to the built-in SYNC-SEP (synchronous separation) circuit, the synchronous correction circuit, the Decoder circuit, and to the Encoder circuit, external circuits can be decrease and character turbulence that occurs when superimposing can be reduced. The processor can conform to the EDS broadcast service and is suitable for AV systems such as VTRs, LDs, and so on. It is a silicon gate CMOS process and M35053-XXXSP is housed in a 20-pin shrink DIP package, M35053-XXXFP is housed in a 20-pin shrink SOP package. For M35053-001SP/FP that is a standard ROM version of M35053XXXSP/FP respectively, the character pattern is also mentioned.
PIN CONFIGURATION (TOP VIEW)
CP1 TESTA
CS
1 2 3
20 19 18
VDD1 HOR CP2 OSCIN VSS P1 P0 TESTB EDO VSS
M35053-XXXSP
SCK SIN
AC
4 5 6 7 8 9 10
17 16 15 14 13 12 11
VDD2 CVIDEO LECHA
FEATURES
* Screen composition ............................... 24 characters ! 10 lines, * * * * * * * * *
32 characters ! 7 lines Number of characters displayed ................................... 240 (Max.) Character composition ..................................... 12 ! 18 dot matrix Characters available .............................................. 256 characters Character sizes available ................... 4 (horizontal) ! 4 (vertical) Display locations available Horizontal direction .............................................. 240 locations Vertical direction ................................................... 256 locations Blinking ................................................................. Character units Cycle : approximately 1 second, or approximately 0.5 seconds Duty : 25%, 50%, or 75% Data input ............................. By the serial input function (16 bits) Coloring Background coloring (composite video signal) Blanking Total blanking (14 ! 18 dots) Border size blanking Character size blanking Synchronizing signal Composite synchronizing signal generation (PAL, NTSC, M-PAL) 2 output ports (1 digital line) Oscillation stop function It is possible to stop the oscillation for synchronizing signal generation Built-in half-tone display function Built-in reversed character display function Built-in Decoder (NTSC only) Built-in Encoder (NTSC only) Built-in synchronous correction circuit Built-in synchronous separation circuit
CVIN
Outline 20P4B
CP1 TESTA
CS
1 2 3
20 19 18
VDD1 HOR CP2 OSCIN VSS P1 P0 TESTB EDO VSS
M35053-XXXFP
SCK SIN
AC
4 5 6 7 8 9 10
17 16 15 14 13 12 11
VDD2 CVIDEO LECHA CVIN
* * * * * * * * *
Outline 20P2Q-A
APPLICATION
TV, VCR, Movie
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PIN DESCRIPTION
Symbol OSC1 TESTA __ CS SCK SIN
__
Pin name Clock input Test pin Chip select input Serial clock input Serial data input/ output Auto-clear input Power pin Composite video signal output Character level input Composite video signal input Earthing pin Encode data output Test pin Port P0 output Port P1 output Earthing pin fSC input pin for synchronous signal generation Filter output Horizontal synchronizing signal input Power pin
Input/ Output Input -- Input Input Input/ Output Input -- Output This is the filter output pin 1.
Function
This is the pin for test. Connect this pin to GND during normal operation. This is the chip select pin, and when serial data transmission is being carried out, it goes to "L". Hysteresis input. Includes built-in pull-up resistor. __ When CS pin is "L", SIN serial data is taken in when SCK rises. Hysteresis input. Built-in pull-up resistor is included. This is the pin for serial input of data and addresses for the display control register and the display data memory. Also, serially outputs decode data according to the settings in the relevant registers (serial I/O). When "L", this pin resets the internal IC circuit. Hysteresis input. Includes built-in pull-up resistor. Please connect to +5V with the analog circuit power pin. This is the output pin for composite video signals. It outputs 2VP-P composite video signals. In superimpose mode, character output etc. is superimposed on the external composite video signals from CVIN. This is the input pin which determines the "white" character color level in the composite video signal. This is the input pin for external composite video signals. In superimpose mode, character output etc. is superimposed on these external composite video signals. Please connect to GND using circuit earthing pin. This is the output pin for encode data. It outputs digital three-value data or composite video signals. This is the pin for test. Connect this pin to GND during normal operation. This pin outputs the port output or BLNK1 (character background) signal. This pin outputs the port output or CO1(character) signal. Please connect to GND using circuit earthing pin (Analog side). This is the input pin for the sub-carrier frequency (fSC) for generating a synchronous signal. A frequency of 3.580MHz is needed for NTSC, and a frequency of 4.434MHz in needed for PAL and 3.576MHz is needed for M-PAL. Filter output pin 2. This is the input pin for external composite video signals. This pin inputs the external video signal clamped sync-chip to 1.5V, and internally carries out synchronous separation. Please connect to +5V with the digital circuit power pin.
AC VDD2 CVIDEO
LECHA CVIN VSS EDO TESTB P0 P1 VSS OSCIN
Input Input -- Output -- Output Output -- Input
CP2 HOR
Output Input
VDD1
--
2
BLOCK DIAGRAM
CP1
1 19
HOR
CS Clock oscillation circuit SYNC-SEP circuit
3
Decoder circuit
Data slicer circuit
SCK H counter
4
3.580MHz(NTSC) 4.434MHz(PAL) 3.576MHz(M-PAL)
17
SIN 5
I/O control circuit
Oscillation circuit for synchronizing signal generation
OSCIN
18
CP2 Display location detection circuit Timing generator Timing generator
Data control circuit
Address control circuit
TESTA
2
TESTB
13
Display control register
Reading address control circuit
8 10
CVIDEO CVIN
VDD1 20 Display RAM
NTSC PAL M-PAL video output circuit Display control circuit
9 12
LECHA EDO Shift register
AC
6
VSS
11
Display character ROM Blinking circuit
VSS
16
Port output circuit
14 15
P0 P1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
VDD2
7
3
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MEMORY CONSTITUTION
Address 0016 to EF16 are assigned to the display RAM, address F016 to F816 are assigned to the display control registers. The internal circuit is reset and all display control registers (address F016 to F816) are set to "0" __ display RAM (address 0016 to EF16) and are RAM erased when the AC pin level is "L". Bit DAF DAE DAD DAC DAB DAA DA9 Address 0016 ~ 0
*******
Set "0" in any of bits DAD through DAF of addresses 0016 through EF16, and of bits DAE and DAF of addresses F016 through F816. TESTn (n : a number) is MITSUBISHI test memory, so be sure to observe the setting conditions.
DA8
DA7 DA6 C7 C6
DA5 C5
DA4 DA3 C4 C3
DA2 C2
DA1 DA0 C1 C0
Remarks
0
*******
0
*******
REV BLINK EC2
Reversed Blinking character
____ ___ ___
EC1 EC0
Encode data or character color EC1 EC0 C7 C6 C5
Character code C4 C3 C2 C1 C0
Display RAM
EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0
REV BLINK EC2
TEST25 W/R TEST11 TEST10 DECB1 DECB0 SYSEP1 SYSEP0 SEPV1 SEPV0 PTD1 PTD0 PTC1 PTC0 Port output specify and so on TEST26 DVP4 DVP3 DVP2 DVP1 DVP0 HP7 TEST27 EVP4 EVP3 EVP2 EVP1 EVP0
___
HP6 VP6
HP5 VP5
HP4 VP4
HP3 VP3
HP2 VP2
HP1 VP1
HP0 VP0
VP7
TEST28 D/V EFLD1 EFLD0 DFLD1 DFLD0 VSZ21 VSZ20 VSZ11 VSZ10 HSZ21 HSZ20 HSZ11 HSZ10
_______ _______ ____ ____ _______ ___ __ __
Horizontal display start position and Decode position specify Vertical display start position and Encode position specify Character size and Encode * Decode specify
TEST29 TEST14 TEST13 SPACE DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0 Display mode specify TEST30 TEST19 MB/LB TEST17 TEST16 TEST15 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0 Blinking specify and so on TEST31 TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF
_____ _____
BB
BG
BR
LEVEL0 PHASE2 PHASE1 PHASE0 Raster color specify BLK1 BLK0 Control display and so on
TEST32 TEST24 RGBON TEST22 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0 Cursor display specify EX
0 0 LEVEL1 EHP4 EHP3 EHP2 EHP1 EHP0 RAMERS DSPON STOP1 STOPIN SCOR Fig. 1 Memory constitution (M35053-XXXSP/FP)
4
Rows
1 8 9 11 14 15 17 18 19 20 21 23 24
2
3
4
5
6
7
10
12
13
16
22
Lines
1
0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716
2
1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16
3
3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 4016 4116 4216 4316 4416 4516 4616 4716
4
4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16
5
6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716
6
7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16
SCREEN CONSTITUTION
7
9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716
8
A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16
9
C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716
10 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16
Note : The hexadecimal numbers in the boxes show the display RAM address.
The screen lines and rows are determined from each address of the display RAM. The screen consitution (24 characters ! 10 lines) is shown in Figure 2 the screen constitution (32 characters ! 7 lines) is shown in 3.
Fig. 2 Screen constitution (24 characters ! 10 lines)
Rows
1 12
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Lines
1
0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16
2
2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16
3
4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16
4
6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16
5
8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16
6
A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16
7
C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16
Notes 1. The hexadecimal numbers in the boxes show the display RAM address. Notes 2. When 32 characters x 7 lines are displayed, set blank code "FF16" to character code of addresses E016 to EF16.
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
Fig. 3 Screen constitution (32 characters ! 7 lines)
5
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Display RAM DESCRIPTION
Display RAM Address 0016 to EF16 DA 0~C 0 C0 (LSB) 1 C1 Name Status 0 1 0 1 2 C2 0 1 3 C3 0 1 4 C4 0 1 5 C5 0 1 6 C6 C7 (MSB) 8 EC0 0 1 7 0 1 0 1 9 EC1 0 1 A EC2 0 1 B BLINK 0 1 C REV
__
Contents Function Set ROM-held character code of a character needed to display.
Remarks
When EFILD1, 0=1, 0 or 0, 1, set code of the data needed to encode. When RGBON=1, set background color by character unit.
Refer to encode function. Refer to supplemental explanation (4).
No blinking Blinking Normal character Reversed character
Refer to BLINK2 to 0 (address F516)
0 1
Note. Resetting at the AC pin RAM-erases the display RAM, and the status turns as indicated by the mark
around in the status column.
6
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Display control register
(1) Address F016 DA 0~D 0 PTC0 Register Status 0 1 1 PTC1 0 1 2 PTD0 0 1 3 PTD1 0 1 4 SEPV0 0 1 5 SEPV1 0 1 6 SYSEP0 0 1 7 SYSEP1 0 1 8 DECB0 0 1 9 DECB1 0 1 A TEST10 0 1 B TEST11 0 1 0 1 0 1 Output data from SIN pin (Note 2) Refer to decode data output timing. P0 output (port 0) BLNK1 output P1 output (port 1) CO1 output It is negative polarity at P0 output "L", BLINK1 output. It is positive polarity at P0 output "H", BLINK1 output. It is negative polarity at P01 output "L", CO1 output. It is positive polarity at P01 output "H", CO1 output. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. SYSEP1 0 0 1 1 DECB1 0 0 1 1 Can not be used. It should be fixed to "1". It should be fixed to "0". Can not be used. Input data from SIN pin
____
Contents Function
Remarks Port output control
Refer to supplemental explanation (5). Control the port data
Refer to supplemental explanation (5). Specifies the vertical synchronous separation criterion
Refer to supplemental explanation (1). SYSEP0 0 1 0 1 DECB0 0 1 0 1 Bias potential Can not be used. Can not be used. 1.75V Can not be used. Bias potential 2.35V Can not be used. Can not be used. Can not be used. Specifies the sync-bias potential
Specifies the decoding bias potential
Control data I/O
C
W/R
D
TEST25
It should be fixed to "0". Can not be used.
__
Notes 1. The mark around the status value means the reset ___ by the "L" level is input to AC pin. status __ Notes 2. Not necessary to release after setting W/R to "1". Turn CS to "H" to switch over to input mode.
7
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(2) Address F116 DA 0~D 0 Register HP0 (LSB) 1 HP1 Contents Status 0 1 0 1 2 HP2 0 1 3 HP3 0 1 4 HP4 0 1 5 HP5 0 1 6 HP6 HP7 (MSB) 8 DVP0 (LSB) 9 DVP1 0 1 7 0 1 0 1 0 1 A DVP2 0 1 B DVP3 DVP4 (MSB) TEST26 0 1 C 0 1 0 1 It should be fixed to "0". Can not be used. DVS= 2nDVPn+6
n=0 4
Function Let horizontal display start position be HS, HS=T !( 2 nHPn+6)
n=0 7
Remarks Set the horizontal display start position by use of HP7 through HP0. HP7 to HP0 = (00000000) to (00001111) setting is forbidden.
HOR
VS
It can be set this up to 240 steps in increments of one T.
VERT
HS
Character displaying area
T : The oscillation cycle of display clock
Let the slice lines be DVS,
Set the slice lines (horizontal scanning lines) under decoding by use of DVP4 through DVP0. DVP4 to DVP0 = (00000) to (00011) setting is forbidden. Thus, it can be defined a setting up to 26 steps covered by a range from line 10 to line 35. Refer to supplemental explanation (2) about slice lines (DVS).
D
8
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(3) Address F216 DA 0~D 0 VP0 (LSB) 1 VP1 Register Status 0 1 0 1 2 VP2 0 1 3 VP3 0 1 4 VP4 It can be set this up to 249 steps in increments of one H. VS=H! 2 nVPn
n=0 7
Contents Function Let vertical display start position be VS,
Remarks Set the vertical display start position by use of VP7 through VP0. VP7 to VP0 = (00000000) to (00000110) setting is forbidden.
HOR
VS
VERT
0 1
HS
5
VP5
0 1
Character displaying area
VP7 to VP0 = (00000000) to (00100011) setting is forbidden under encoding or decoding.
6
VP6 VP7 (MSB)
0 1 H : The oscillation cycle of horizontal synchronous signal Let the encode lines be EVS,
4
7
0 1 0 1 0 1 EVS=
8
EVP0 (LSB) EVP1
9
2nEVPn+6
n=0
Sets the lines (horizontal scanning lines) under encoding by use of EVP4 through EVP0. EVP4 to EVP0 = (00000) to (00011) setting is forbidden. Thus, it can be defined a setting up to 26 steps covered by a range from line 10 to line 35. Refer to supplemental explanation (2) about the encode lines (EVS).
A
EVP2
0 1
B
EVP3 EVP4 (MSB) TEST27
0 1
C
0 1 0 1 It should be fixed to "0". Can not be used.
D
9
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(4) Address F316 DA 0~D 0 HSZ10 Register Status 0 1 1 HSZ11 0 1 2 HSZ20 0 1 3 HSZ21 0 1 4 VSZ10 0 1 5 VSZ11 0 1 6 VSZ20 0 1 7 VSZ21 0 1 8 DFLD0 0 1 9 DFLD1 0 1 A EFILD0 0 1 B EFLD1
___
Contents Function
HSZ11 0 0 1 1 HSZ21 0 0 1 1 VSZ11 0 0 1 1 VSZ21 0 0 1 1 DFLD1 0 0 1 1 EFLD1 0 0 1 1 HSZ10 0 1 0 1 HSZ20 0 1 0 1 VSZ10 0 1 0 1 VSZ20 0 1 0 1 DFLD0 0 1 0 1 EFLD0 0 1 0 1 Horizontal direction size 1T/dot 2T/dot 3T/dot 4T/dot Horizontal direction size 1T/dot 2T/dot 3T/dot 4T/dot Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot Field detection OFF The first field The second field Can not be used Field detection OFF The first field The second field Can not be used
Remarks Character size setting in the horizontal direction for the first line.
Character size setting in the horizontal direction for the 2nd line to 10th line.
Character size setting in the vertical direction for the first line.
Character size setting in the vertical direction for the 2nd line to 10th line.
Specifies the field determination procedure in relation to the Decoding functions. Refer to supplemental explanation (2). Specifies the field determination procedure in relation to the Encoding functions. Refer to supplemental explanation (2). Encode (EDO) output control. Refer to encode function (3).
0 1
C
D/V
0 1
It outputs digital signal. It outputs composite video signal (Note). It should be fixed to "0". Can not be used.
___
D
TEST28
0 1
Note. Output buffer is needed with EDO (12-pin) at D/V= "1". (Refer to example of peripheral circuit)
10
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(5) Address F416 DA 0~D 0 DSP0 Register Status 0 1 1 DSP1 0 1 2 DSP2 0 1 3 DSP3 0 1 4 DSP4 0 1 5 DSP5 0 1 6 DSP6 0 1 7 DSP7 0 1 8 DSP8 0 1 9 DSP9 0 1 0 A SPACE 1 0 B TEST13 1 0 C TEST14 1 0 D TEST29 1 Normal display Put a space line between line 2 and line 3, and between line 8 and line 9. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. Put a space line between line 2 and line 3 in displaying 32 characters. Set the display mode of line 10. Set the display mode of line 9. Set the display mode of line 8. Set the display mode of line 7. Set the display mode of line 6. BLK1 0 0 1 1 BLK0 0 1 0 1 DSPn= "1" DSPn= "0"
Matrix-outline border Matrix-outline size size
Contents Function
Remarks Set the display mode of line 1.
Set the display mode of line 2.
Character size Border size Matrix-outline size Border size Character size Matrix-outline size
Set the display mode of line 3.
Set the display mode of line 4.
Depends on BLK0 and BLK1 (address F816) DSPn in the generic name for DSP0 to DSP9. DSP0 to DSP9 are each controlled independently.
Set the display mode of line 5.
11
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(6) Address F516 DA 0~D 0 BLINK0 Register Status 0 1 1 BLINK1 0 1 0 2 BLINK2 1
_
Contents Function
BLINK0 0 0 1 1 BLINK1 0 1 0 1 Duty Blinking off 25% 50% 75%
Remarks Blinking duty ratio can be altered. (Note)
Division of vertical synchronizing signal into 1/64. Cycle approximately 1 second. Division of vertical synchronizing signal into 1/32. Cycle approximately 0.5 second. NTSC, M-PAL mode PAL mode Interlace Non interlace
_
Blinking cycle can be altered.
3 4
N/P
__ __ _ _
0 1 0 1 0
Refer to register MPAL
INT/NON
Scanning lines control (only in internal synchronization)
MPAL 0 1 0 1
__
N/P 0 0 1 1 PALH
Synchronous mode NTSC M-PAL PAL Not available Number of scanning lines 625H lines 626H lines 627H lines 628H lines
5
MPAL 1
Synchronizing signal is selected _ with this register and N/P register.
0 6 PALH 1 7 EQP 0 1 8 TEST15 0 1 9 TEST16 0 1 A TEST17
__ __ __ __ _ _ _ _ _ _
INT/NON 0 1 0 1
It should be fixed to "0" at NTSC
0 1
Not include the equivalent pulse. Include the equivalent pulse. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. Output from MSB side Output from LSB side It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used.
Effective only at non-interlace
0 1
B
MB/LB
0 1
Setting the decode data output form
C
TEST19
0 1
D
TEST30
0 1
Note. To blink a character, set 1 to DAB (the blinking bit) of the display RAM.
12
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(7) Address F616 DA 0~D Register Status 0 0 PHASE0 1 0 1 PHASE1 1 0 2 PHASE2 1 3 LEVEL0 0 1 0 4 BR 1 0 5 BG 1 0 6 BB 1 7 BLKHF
_ _ _ _ _
Contents Function PHASE2 PHASE1 PHASE0 0 0 0 0 1 1 1 1 Internal bias off Internal bias on BB 0 0 0 0 1 1 1 1 BG 0 0 1 1 0 0 1 1 BR 0 1 0 1 0 1 0 1
Character background color
Remarks Raster color setting Raster Black Red Green Yellow Blue Magenta Cyan White Generates bias potential for composite video signals Character background color setting. Refer to supplemental explanation (3) about video signal level
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
Refer to supplemental explanation (3) about video signal level
Black Red Green Yellow Blue Magenta Cyan White
0 1
The halftone displaying "OFF" in superimpose The halftone displaying "ON" in superimpose 24 characters 5 10 lines display 32 characters 5 7 lines display Blanking level I 2.3V Blanking level II 2.1V It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. Can not be used. It should to be fixed to "1".
This register is available in the superimpose displaying only. (Note) "1" setting is forbidden under encoding. Set a blackness level
8
LIN24/32
0 1
9
LBLACK
0 1
A
TEST0
0 1
B
TEST1
0 1
C
TEST2
0 1
D
TEST31
0 1
Note. It is neccessary to input the external composite video signal to the CVIN pin, and externally connect a 100 to 200 register in series.
13
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(8) Address F716 DA 0~D 0 CUR0 Register Status 0 1 1 CUR1 0 1 2 CUR2 0 1 3 CUR3 0 1 4 CUR4 0 1 5 CUR5 0 1 6 CUR6 0 1 7 CUR7 0 1 8 CBLINK
_ _ _ _ _
Contents Function Let cursor displaying address be CURS,
Remarks Set the cursor displaying address by use of CUR7 through CUR0. CUR7 to CUR0 (11110000) setting is forbidden under 24 characters display. CUR7 to CUR0 (11100000) setting is forbidden under 32 characters display. Set CUR7 to CUR0 = (11111111) under cursor is not be displayed. The cursor displaying address (CURS) is correspond to display construction.
CURS= 2nCURn
n=0
7
0 1
No blinking Blinking Cursor displaying at the 17th dot by vertical direction. Cursor displaying at the 18th dot by vertical direction. It should be fixed to "0". Can not be used. Normal Character background coloring It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used.
The cursor blinking setting
9
CL17/18
0 1
Refer to character construction.
A
TEST22
0 1
B
RGBON
0 1
Refer to supplemental explanation (4).
C
TEST24
0 1
D
TEST32
0 1
14
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(9) Address F816 DA 0~D Register Status 0 0 BLK0 1 0 1 BLK1 1 2 EX 0 1 3 SCOR 0 1 4 STOPIN 0 1 5 STOP1 0 1 6 DSPON 0 1 7 RAMERS 0 1 8 EHP0 0 1 9 EHP1 0 1 A EHP2 0 1 B EHP3 0 1 C EHP4 0 1 Internal bias OFF Generates bias potential for decoding and synchronous separation. Internal bias ON 1 Notes 1. In dealing with the internal synchronization, cut off external video signals outside the IC. The leakage of external input video signals can be avoided. Notes 2. In displaying color superimposition, enter into the OSCIN pin the fSC signal that phase-synchronizes with the color burst of the composite video signals (input to the CVIN pin). Notes 3. Erases all the display RAM. The character code turns to blank-FF16, the encode data bit and the blinking bit turn to "1" respectively, and reversed character bit turns to "0". D LEVEL1 0 EHS = 2 n EHPn + 6
n=0 4
Contents Function BLK1 0 0 1 1 BLK0 0 1 0 1 DSPn= "1"
Matrix-outline border size
Remarks Display mode (BLNK output) variable
DSPn= "0" Matrix-outline size Character size Border size
Border size Matrix-outline size
Character size Matrix-outline size
External synchronization Internal synchronization Superimpose monotone display Superimpose coloring display (only NTSC) fSC input mode Can not be used. Oscillation VCO for display Stop oscillation VCO for display Display OFF Display ON RAM not erased RAM erased Let encode data programming start position be EHS,
Synchronizing signal switching (Note1) "1" setting is forbidden at internal synchronous or PAL, M-PAL mode displaying. OSCIN oscillation control
Control oscillation VCO for display
This register does not exist (Note 3). Set encode start position by use of EHP4 through EHP0. EHP4 to EHP0 = (00000) to (01111) is setting forbidden. Refer to encode function (3)
15
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Supplemental explanation about display control register
(1) How to effect synchronous separation from composite video signals
Synchronous separation is effected as follows depending on the width of L-level of the vertical synchronous period. 1. Less than 8.4 s ****** Not to be determined to be a vertical synchronous signal. 2. Equal to or higher than 8.4 s but less than 15.6 s ****** When two clocks continue, if take place, it is "L" period is determined to be a vertical synchronization signal. 3. Equal to or higher than 15.6 s ****** It is "L" period is determined to be a vertical synchronous signal with no condition. The determination is made at the timing indicated by V in Fig.3 either in case 2 or in case 3.
Sequence of synchronizing pulse
Composite video signal 8.4s Equalizing pulse 15.6s 8.4s V
Vertical synchronous signal
Fig. 4 The method of synchronous separation from composite video signal.
(2) Field definition
1H First field 1 2 3 4 5 6 7 8 9 10
V
1/2H Pulses during a vertical retrace line erasure period 11
Second field 1' 2' 3' 4' 5' 6' 7' 8' 9' 10'
8~12H
1/2H
1H
stands for either an equalizing pulse or sequence of synchronizing pulse to be used as a trigger of a receiving set. H stands for a horizontal scanning period.
Fig. 5 Field definition
V A horizontal scanning line number corresponds to slice lines DVP4 through DVP0 (address F116) and to encode lines EVP4 through EVP0 (address F216).
16
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(3) Video signal level
Color Sync-chip Pedestal Color burst Black Red Green Yellow Blue Magenta Cyan White -- -- 0 -- 7 /16 2 /16 27 /16 2 /16 /16 2 /16 17 /16 2 /16 11 /16 2 /16 23 /16 2 /16 -- Phase angle (rad) NTSC method PAL, M-PAL method -- -- 4 /16 -- 7 /16 2 /16 5 /16 2 /16 Brightness level (V) Min. 1.3 1.9 1.9 2.1 2.3 2.7 3.1 2.0 2.5 2.9 3.1 Typ. 1.5 2.1 2.1 2.3 2.5 2.9 3.3 2.2 2.7 3.1 3.3 Max. 1.7 2.3 2.3 2.5 2.7 3.1 3.5 2.4 2.9 3.3 3.5 Min. -- -- -- -- 1.5 1.4 1.0 1.0 1.4 1.5 --
VDD : 5.0V, Ta : 25C Amplitude ratio (to color burst) Typ. -- -- 1.0 -- 3.0 2.8 2.0 2.0 2.8 3.0 -- Max. -- -- -- -- 4.5 4.2 3.0 3.0 4.2 4.5 --
/16 2 /16 15 /16 2 /16
11 /16 2 /16 9 /16 2 /16 --
R-Y CB1 /4 CB /4 CB2
Fig. 6 Bector phases
RS1
B-Y
CB Color burst under NTSC Color burst under PAL or M-PAL CB1,CB2 RS1,RS2 Color subcarrier under PAL or M-PAL
RS2
(4) Setting RGBON (address F716)
a) When encode is off .... EFILD1, 0 (address F316) = 0,0 Encode setting .... Not effected RGBON = "0" ..... Sets background colors depending on BB, BG, and BR (address F616), screen by screen. RGBON = "1" ..... Sets background colors depending on EC2 to EC0 (address 0016 to EF16), character by character. The color setting is shown below. b) When encode is on ... EFILD1, 0 (address F316) = 0, 1 or 1, 0 Encode setting .... Sets encode data depending on EC2 through EC0. (Refer to the encode functions for details.) RGBON = "0" ..... Sets background colors depending on BB, BG and BR (address F616) screen by screen. RGBON = "1" ..... This setting can not be used. (When encode is on, setting RGBON to "1" results in setting both encode data and background colors depending on the same memory (EC2 through EC0), so this setting can not be used.
Color Setting EC2 0 0 0 0 1 1 1 1 EC1 0 0 1 1 0 0 1 1 EC0 0 1 0 1 0 1 0 1 Color Black Red Green Yellow Blue Magenta Cyan White
17
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(5) Port output and BLNK1, CO1 output
PTD0 (PTD1) 1 PTC0 ( PTC1) 1 Output 0 Polarity switching PTD0 (PTD1) 0 Select
BLNK1 (CO1)
PTD0,1,PTC0,1 (Address F0 16)
Fig. 7 Example of port control
(6) Setting conditions for oscillating or stopping the display clock
at display clock operating STOP1 DSPON CS pin 0 1 L at display clock stop 1 0 H STOP1,DSPON (Address F816)
(7) Setting condition at LEVEL0,1
Operation state (Character display) Internal synchronous LEVEL0 LEVEL1 1 0 External synchronous 1 1 Now-working condition (no characters are displayed) 0 0
LEVEL0 (address F616), LEVEL1 (address F816)
18
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DISPLAY FORMS
M35052-XXXSP/FP has the following four display forms as the blanking function, when CO1 and BLNK1 are output. (1) Character size : Blanking same as the character size. (2) Border size : Blanking the background as a size from character. (3) Matrix-outline size: Blanking the background as a size from all character font size. (4) Matrix-outline : Blanking the background as a size from all border size character font size. Border display.
This display format allows each line to be controlled independently, so that two kinds of display formats can be combined on the same screen.
12 dots Scanning line 18 dots
12 dots
14 dots
14 dots
CO1V BLNK1 V
CVIDEO a a a a
(1) Character size
(2) Border size
(3) Matrix-outline size
(4) Matrix-outline border size
Note: In this case, the output polarity that CO1 V and BLNK1V is positive.
a:Background carrier color signal
Fig. 8 Display forms at each display mode
19
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DATA INPUT EXAMPLE
Data of display RAM and display control registers can be set by then serial input function. Example of data setting is shown in Figure 9. Owing to automatic address increment, not necessary to enter addresses for the second and subsequent data. In automatically, the next of address F816 is assigned to address 0016. Fig. 9 shows an example of data serially entered.
Address /Data Address (F816) Data (F816) Data (0016) Data (0116) ~
DA F 0 0 0 0
DA E 0 0 0 0
DA D 0 0 0 0
DA C 0 0
DA B 0 0
DA A 0 0
DA 9 0 0
DA 8 0 0
DA 7 1 0 C7 C7
DA 6 1 0 C6 C6
DA 5 1 0 C5 C5
DA 4 1 0 C4 C4 ~
DA 3 1 0 C3 C3
DA 2 0 0 C2 C2
DA 1 0 0 C1 C1
DA 0 0 0 C0 C0
Remarks Specify address Display OFF
REV BLINK EC2 EC1 EC0 REV BLINK EC2 EC1 EC0 ~
Specify address display RAM 0 to EF16. C3 C3 C2 C2 C1 C1 C0 C0
Data (EE16) Data (EF16) Data (F016) Data (F116) Data (F216) Data (F316) Data (F416) Data (F516) Data (F616) Data (F716) Data (F816)
0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 1 0
REV BLINK EC2 EC1 EC0 REV BLINK EC2 EC1 EC0
_ _ _ _ _
C7 C7 1 HP 7 VP 7
C6 C6 0 HP 6 VP 6
C5 C5 0 HP 5 VP 5
C4 C4 0 HP 4 VP 4
W/R
0
1
0
0
PTD PTD PTC PTC 1 1 0 0 HP 3 VP 3 HP 2 VP 2 HP 1 VP 1 HP 0 VP 0
DVP DVP DVP DVP DVP 4 3 2 1 0 EVP EVP EVP EVP EVP 4 3 2 1 0
_
D/V 0 0 0 0
EFLD EFLD DFLD DFLD VSZ VSZ VSZ VSZ HSZ HSZ HSZ HSZ 1 0 1 11 0 21 20 11 10 21 20 10 0
_ _
Specify address register F016 to DSP DSP DSP DSP DSP DSP DSP DSP DSP DSP F716. SPACE 9 8 7 6 5 4 3 2 1 0
__ _
MB/LB 0 RGBON
0 0 0
0 LBLACK
_ _ _ _ _
0
_ _ _ _ _
EQP PALH MPAL BB BG
INT BLINK BLINK BLINK N/P /NON 2 1 0 BR LEVEL PHASE PHASE PHASE 0 2 1 0
_
LIN BLKHF 24/32
CL CURS CURS CURS CURS CURS CURS CURS CURS CBLINK 17/18 7 6 5 4 3 2 1 0 EX BLK 1 BLK 0 Display ON
STOP STOP LEVEL EHP EHP EHP EHP EHP RAM DSPON SCOR 1 0 ERS 1 IN 1 4 3 2 Fig. 9 Example of data setting by the serial input function
20
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
SERIAL DATA INPUT TIMING
(1) The address consists of 16 bits. (2) The data consists of 16 bits. __ (3) The 16 bits in the SCK after the CS signal has fallen are the address, and for succeeding input data, the address is incremented every 16 bits.
CS
SCK
SIN LSB MSB LSB MSB LSB MSB
Address (16 bit)
Data N (16 bit)
Data N + 1 (16 bit) N=1, 2, 3 ......
Fig. 10 Serial input timing
Output timing of decode data
__
(1) Setting "1" in the W/R register activates output mode. (2) Outputs decode data in 16 clocks of the SCK after switching over to output mode. (Don't enter the SCK for more than 16 clocks.) __ (3) Raising the CS signal deactivates output mode. __ (To switch over to input mode, cause CS to fall.) (4) If no data are present, or if data have already been read, 000016 is output.
CS
SCK 1 2 ... 15 16
SIN MSB Data (16 bit) (Register W/R = "1") Output mode MSB LSB LSB Address (16 bit)
Decode data (16 bit)
When register MB/LB (Address F5 16) = "0"
Fig. 11 Decode data output timing
21
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Encode functions (effective for NTSC only) (1) Setting encode data
Setting data code (000 - 111) in EC0 through EC2 (bits DA8 through DAA) of the display RAM (addresses 0 through EF16) encodes. A sample setting and data code are shown below.
An example of setting
1H
16 bit data
LSB
MSB
(address) (Note)
(0)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
EC2 ~ EC0= 100 100 100 101 001
5 characters fixed
2 bit / a character (Set one code of 000 to 011) 8 characters Set by every 2 bits (one character) with EC2 to EC0.
A suite of data code (000 - 111) for encoding to be set in EC2 through EC0 are assigned as given below. EC2 0 0 0 0 1 1 1 1 EC1 0 0 1 1 0 0 1 1 EC0 0 1 0 1 0 1 0 1 Data
L L
HL HH LHLH L H L 18 dots

V***** 192 ! fH (horizontal synchronous frequency) for fH = 15.625 kHz
12 dots
Can not be used No encoding Note: Refer to the next page about address setting.
Fig. 12 An example of data code setting
22

LH
The oscillation frequency when encoding: 3 MHzV 1 clock cycle: 0.333s 1 character (12 dots): 3.996s 2 bits/1 character: 3.996s 1 bit: 1.998s

MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(2) Setting addresses
Set encode data in EC0 through EC2 of addresses (that correspond to an extent from the first character to the thirteenth character in each line as appearing on the screen.) Set "111" to EC2 through EC0 of all the addresses in which you set no encode data.
Screen The first character .......................................................... The 13th character ................................................ The 24th character line 1 line 2 line 3 line 4 line 5 line 6 line 7 line 8 line 9 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16 C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716
line 10 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16
Fig.13 Display monitor

Using area for encode data setting Useless area Start setting data from the first line. Data set in the lines specified by registers EVP0 through EVP3 (address F216) will be encoded. Setting data in the second and subsequent lines, it is possible to set encode data to ten consecutive lines from those secified by registers EVP0 to EVP2. Similarly to encode line N specified by registers EVP0 through EVP2, extending encode lines to line N-1 and to line N+1, it is possible to read encode data more certainly. 23
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(3) Encode data output
_
_
Control encode data (EDO) output by register D/V (address F316) a) Register D/V (address F316)="0" Digital 3 value output
EDO magnify
H Clock run-in start bit character 1 character 2
VOH_a VOM_a VOL_a
A B C D E
LSB1
MSB1 LSB2
MSB2
_
b) Register D/V (address F316)="1" Composite video signal output
EDO magnify
H
VOH_b VOM_b VOL_b
A B C D E
Symbol A B C D E H VOH_a VOM_a VOL_a VOH_b VOM_b VOL_b
Min.
-- -- -- -- -- -- -- 0.4 -- 3.1 1.9 1.3
(a) (b)
Typ. (EHS+9)! 1/(fH!192 )g 6.5P 2P 1P 16P 1/fH 5.0 2.3 0 3.3 2.1 1.5
VDD : 5.0V, Ta : 25C Max. Unit
-- -- -- -- -- -- -- 4.0 -- 3.5 2.3 1.7
s s s s s s V V V V V V
1P=1/(fH!32) fH : Horizontal synchronous frequency(MHz)
g It is possible to make a fine adjustment (EHS=16 to 31. 16 settings. in increments of 1/(fH ! 192)) by use of EHS (registers EHP4 to EHP0 of address F816). (EHS 15 setting is forbidden.)
Fig. 14 Encode data output
24
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
CHARACTER FONT
Images are composed on a 12 ! 18 dot matrix, and characters can be linked vertically and horizontally with other characters to allow the display the continuous symbols. Character code "FF16" is so fixed as to be blank and to have no background, thus cannot assign a character font to this code.
(1) Border display (set by register BLK0, 1 (address F816))
12 dots
When the character extends to the top dot of the matrix, no border is left at the top.
18 dots
When the character extends to the bottom (18th) dot of the matrix, no border is left at the bottom.
Note: Hatching represents border.
(2) Cursor display (Border display)
Character
Note: When the cursor positioning at the bottom (18th) dot, no border is left at the bottom.
Positioning the cursor at the 17th dot. Register CL17/18 (address F716) ="0" Register CL17/18 = "1"
Positioning the cursor at the 18th dot.
Fig. 15 Character font and border
25
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Precautions
(1) Points to note in setting the display RAMs a) Be careful to the edges may sway depending on the combination of character's background color and raster color.
Edge sway
Fig. 16 Example of display
b) If what display exceeds the display area in dealing with external synchronization, (if use double - size characters), set the character code of the addresses lying outside that display area blank code - "FF16".
Inside of display
Outside of display area
0016
0B16 0C16 2316 2416 4716 5F16
1716 2F16
Inside of display
1816 3016 4816
Outside of display area
C016 D816
D716 EF16
Numbers are adresses
Set blank code "FF 16" to character code of
part.
Fig. 17 Example of display
26
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(2) Before setting registers at the starting of system, be __ to reset sure the M35052-XXXSP/FP by applying "L" level to the AC pin. (3) Power supply noise When power supply noise is generated, the internal oscillator circuit does not stabilize, whereby causing horizontal jitters across the picture display. Therefore, connect a bypass capacitor between the power supply and GND. (4) Synchronous correction action When switching channel or in the special playback mode (quick playback, rewinding, and so on) of VTR, effect of synchronous correction becomes strong, and distortion of a character is apt to occur because the continuity of video signal is suddenly switched. When the continuity of video signal is out of order, erasure of displayed characters is recommended in a extreme short time to raise the quality of displayed characters. (5) Notes on fSC signal input This IC amplifies the subcarrier frequency (fSC) signal (NTSC, MPAL system: 3.58MHz, PAL system: 4.43MHz) input to the OSCIN pin (17-pin) and generates the composite video signal internally. The amplified fSC signal can be destabilized in the following cases. a) When the fSC signal is outside of recommended operating conditions. b) When the waveform of the fSC signal is distorted. c) When DC level in the fSC waveform fluctuates. When the amplified signal is unstable, the composite video signal generated inside the IC is also unstable in terms of synchronization with the subcarrier and phase. Consequently, this results in color flicker and lost synchronization when the composite video signal is generated. Make note of the fact that this may prevent a stable blue background from being formed. (6) Forbidding to stop entering the fSC signal This IC doesn't properly work if the fSC signal is not entered into the OSCIN pin (pin 17), so don't stop the fSC signal so as to work the IC. To stop the IC, turn the display off (set 0 in the register DSPON (address F816).) (7) Forbidding to set data during the period in which the internal oscillation circuit stabilizes a) To start entering the fSC signal when its input is stopped. b) To start oscillating the oscillation circuit for display when its oscillation is stopped. (to assign "1" to the register STOP1 (address F816) when it is assigned "0", or the like.) c) To turn on the internal bias when it is turned off. (to assign "1" to the register LEVEL1 (address F816) when it is assigned "0".) There can be instances in which data are not properly set in the registers until the internal oscillation circuit stabilizes, so follow the steps in sequence as given below. 1) Set "0" in the register DSPON (address F816). (the display is turned off) 2) Effect the settings a), b), and c) given above.
3) Wait 20 ms (the period necessary for the internal oscillation circuit to stabilize) before entering data. 4) Set necessary data in other registers, and make the display RAM ready.
27
M35053-XXXSP/FP PERIPHERAL CIRCUIT
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
In displaying color superimposition, enter Note 4 : Construct integral circuit by built-in 30k __ into the OSCIN pin the fSC signal that of AC pin and an external condenser. phase-synchronizes with the color burst of Attention to supply voltage rise time about the composite video signals (input to the this CR constant. CVIN pin). Note 5 : External loop filter 2 constant is proviNote 7: In dealing with the internal synchronization, sional valve. cut off external video signals outside the IC. Note 6 : Connect fSC frequency. The leakage of external input video signals 0.3Vp-p VOSCIN 4.0Vp-p can be avoided. NTSC =3.580MHz _ Note 8: Outpot buffer is needed when register D/V PAL =4.434MHz (address F316)="1" M-PAL =3.576MHz

Fig. 18 M35053-XXXSP/FP example of peripheral circuit
28
+5.0V +5.0V
External composite videop signal input + + +
0.01 I/O 100 1 1 100
From microcomputer +
+7.0V
+5.0V
Note 2 Note 3
1
470
CP1 TESTA HOR CP2 OSCIN
fsc 0.1 17 Delay circuit 1K 0.01 18 47P 19
VDD1
20
+
470P 1.5K 0.22 3 2
Note 5
47
Note 1 CS SCK SIN AC VDD2 CVIDEO LECHA EDO VSS
11 12 4
+ Note 4
5
1.50V
47 10K 1
VSS 16 P1 P0 TESTB
13 14 15
+
6 7 8 9 10
Note 6
Composite video signal output
Note 8
Digital encode output
+7.0V
Note 7 CVIN
2.2K
Composite video signal encode output
Output buffer
220
+
120
75
150
220
Output buffer
Note 1: Clamp sync chip to 1.50V. Note 2: Set basic electric potential in consid eration of dynamic range of the transistor. Note 3: External loop filter 1 constant is provisional valve.
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
TIMING REQUIREMENTS (Ta = -20C to 70C, VDD = 50.25V, unless otherwise noted)
Symbol tw(SCK)
__
Parameter Min. SCK width
__
Limits Typ. - - - - - - Max. - - - - - -
Unit ns ns
400 200 2 200 200 12.8
__ __
tsu(CS)
__
CS setup time
__
th(CS) tsu(SIN) th(SIN) tword
CS hold time SIN setup time SIN hold time 1 word writing time
s
ns ns
s
Note. When oscillation stop at register STOR1 (address F816), 1V (field term) or more of tSU(CS) and th(CS) are needed.
CS
tsu(CS) tw(SCK) tw(SCK)
tw(CS) 2s (min.)
th(CS)
SCK
tsu(SIN) th(SIN)
SIN
CS
tword
SCK 1
Fig. 19 Serial input timing requirements
2
3
...
14
15
16
1
2
3
...
14
15
16
29
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
ABSOLUTE MAXIMUM RATINGS (VDD = 5V, Ta = -20 to 70C, unless otherwise noted)
Symbol VDD VI VO Pd Topr Tstg Supply voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature Ta=25C Parameter Conditions With respect to VSS Ratings -0.3~6.0 VSS-0.3VIVDD+0.3 VSSVOVDD 300 -20~70 -40~125 Unit V V V mW C C
RECOMMENDED OPERATING CONDITIONS (VDD = 5V, Ta = -20 to 70C, unless otherwise noted)
Symbol VDD VIH VIL VCVIN VOSCIN Supply voltage
__ __
Parameter Min. 4.75 0.8!VDD 0 - 0.3VP-P
__ __
Limits Typ. 5.00 VDD 0 2.0VP-P - 3.580 Max. 5.25 VDD 0.2!VDD - 4.0VP-P
Unit V V V V V
"H"level input voltage AC, CS, SIN, SCK, TESTA, TESTB "L" level input voltage AC, CS, SIN, SCK, TESTA, TESTB CVIN, HOR Input voltage OSCIN (Note 1)
fOSCIN
Synchronous signal oscillation frequency (Duty 40~60%)
-
4.434 3.576
-
MHz
fOSC1 fOSC2
Display oscillation frequency
24 characters!10 lines 32 characters!7 lines
- -
480!fH (Note 2) 640!fH (Note 2)
- -
MHz MHz
Notes 1. Noise component is within 30mV. Notes 2. fH: Horizontal synchronous frequency (MHz).
ELECTRICAL CHARACTERISTICS (VDD = 5V, Ta = 25C, unless otherwise noted)
Symbol VDD IDD VOH VOL RI VOH_a VOM_a VOL_a Supply voltage Supply current "H"level output voltage P0, P1, SIN "L" level output voltage P0, P1, SIN Pull-up resistance
__ __
Parameter
Test conditions Min. Ta=-20~70C VDD=5.00V VDD=4.75V, IOH=-0.4mA VDD=4.75V, IOL=0.4mA VDD=5.00V VDD=5.00V, IOH=-0.04mA VDD=5.00V, IOM=0.04mA VDD=5.00V, IOL=0.04mA 4.75 - 3.75 - 10 4.0 0.4 -
Limits Typ. 5.00 30 - - 30 - 2.3 - Max. 5.25 50 - 0.4 100 - 4.0 0.4
Unit V mA V V k V V V
AC, CS, SCK, SIN, TESTB "H" level output voltage EDO "M"level output voltage EDO "L" level output voltage EDO
VIDEO SIGNAL INPUT CONDITIONS (VDD = 5V, Ta = -20 to 70C, unless otherwise noted)
Symbol VIN-SC Parameter Composite video signal input clamp voltage Test conditions Min. Sync-chip voltage - Limits Typ. 1.5 Max. - V Unit
30
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Note for Supplying Power
__
(1) Timing of power supplying to AC pin The internal circuit of M35052-XXXSP/FP is reset when the level __ of the auto clear input pin AC is "L". This pin is hysteresis input __ with the pull-up resistor. The timing about power supplying of AC pin is shown in Figure 20. tW is the interval after the supply voltage__ becomes 0.8 ! VDD or more and before the supply voltage to __ the AC pin (VAC) becomes 0.2 ! VDD or more. After supplying the power (VDD and VSS) to M35052-XXXSP/FP, the tW time must be reserved for 1ms or more. Before starting
input from the microcomputer, the waiting time __ must be re(ts) served for 500ms after the supply voltage to the AC pin becomes 0.8 ! VDD or more. (2) Timing of power supplying to VDD1 pin and VDD2 pin The power need to supply to VDD1 and VDD2 at a time, though it is separated perfectly between the VDD1 as the digital line and the VDD2 as the analog line.
Voltage [V]
VDD
Supply voltage
0.8!VDD
VAC
(AC pin input voltage )
0.2!VDD
tw
ts
Time t [s]
__
Fig. 20 Timing of power supplying to AC pin
PRECAUTION FOR USE
Notes on noise and latch-up Connect a capacitor (approx. 0.1 F) between pins VDD and VSS at the shortest distance using relatively thick wire to prevent noise and latch up.
ROM ORDERING METHOD
Please submit the information described below when ordering Mask ROM. (1) ROM Order Confirmation Form ................................................ 1 (2) Data to be written into mask ROM ................................. EPROM (three sets containing the identical data) (3) Mark Specification Form ........................................................... 1 (4) Program for character font generating + froppy disk in which character data is input
31
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
STANDARD ROM TYPE : M35053-001SP/FP
M35053-001SP/FP is a standard ROM type of M35053-XXXSP/FP character patterns are fixed to the contents of Figure 21 to 24.
32
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
0016
0116
0216
0316
0416
0516
0616
0716
0816
0916
0A16
0B16
0C16
0D16
0E16
0F16
1016
1116
1216
1316
1416
1516
1616
1716
1816
1916
1A16
1B16
1C16
1D16
1E16
1F16
2016
2116
2216
2316
2416
2516
2616
2716
2816
2916
2A16
2B16
2C16
2D16
2E16
2F16
3016
3116
3216
3316
3416
3516
3616
3716
3816
3916
3A16
3B16
3C16
3D16
3E16
3F16
Fig. 21 M35053-001SP/FP character pattern (1)
33
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
4016
4116
4216
4316
4416
4516
4616
4716
4816
4916
4A16
4B16
4C16
4D16
4E16
4F16
5016
5116
5216
5316
5416
5516
5616
5716
5816
5916
5A16
5B16
5C16
5D16
5E16
5F16
6016
6116
6216
6316
6416
6516
6616
6716
6816
6916
6A16
6B16
6C16
6D16
6E16
6F16
7016
7116
7216
7316
7416
7516
7616
7716
7816
7916
7A16
7B16
7C16
7D16
7E16
7F16
Fig. 22 M35053-001SP/FP character pattern (2)
34
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
8016
8116
8216
8316
8416
8516
8616
8716
8816
8916
8A16
8B16
8C16
8D16
8E16
8F16
9016
9116
9216
9316
9416
9516
9616
9716
9816
9916
9A16
9B16
9C16
9D16
9E16
9F16
A016
A116
A216
A316
A416
A516
A616
A716
A816
A916
AA16
AB16
AC16
AD16
AE16
AF16
B016
B116
B216
B316
B416
B516
B616
B716
B816
B916
BA16
BB16
BC16
BD16
BE16
BF16
Fig. 23 M35053-001SP/FP character pattern (3)
35
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
C016
C116
C216
C316
C416
C516
C616
C716
C816
C916
CA16
CB16
CC16
CD16
CE16
CF16
D016
D116
D216
D316
D416
D516
D616
D716
D816
D916
DA16
DB16
DC16
DD16
DE16
DF16
E016
E116
E216
E316
E416
E516
E616
E716
E816
E916
EA16
EB16
EC16
ED16
EE16
EF16
F016
F116
F216
F316
F416
F516
F616
F716
F816
F916
FA16
FB16
FC16
FD16
FE16
FF16 blank
Fig. 24 M35053-001SP/FP character pattern (4)
36
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MASK ROM ORDER CONFIRMATION FORM GZZ-SH00-51B <69A0> MASK ROM ORDER CONFIRMATION FORM SCREEN DISPLAY IC M35053-XXXSP/FP MITSUBISHI ELECTRIC
Mask ROM number
Data : Receipt
Section head Supervisor signature signature
Note : Please fill in all items marked g,
.
g Customer
( Date :
)
Data issued g
Program version name
M053R
V
g Remarks q Return the Character Font Preparation Program after use. q Three EPROMs are required. (All the three EPROMs must be same types. Check @ in the appropriate box.) 27512 (1) The font data prepared by the Character Font Preparation Program is saved as a binary type object file (addresses 0000h to 7FFFh). Three sets of these EPROMs are required. (2) Attach the erase protect seals on three EPROMs. Each seal bears the type name (M35053), and ROM No. (-...SP/FP). q Write the checksum code (hexadecimal notation) for entire EPROM areas. Checksum q Select the marking type (Check @ in the appropriate box). Special Mark Standard Mark q The package type ....... SDIP type (M35053-XXXSP) ....... SSOP type (M35053-XXXFP) g q Comments ....... Fill in the Mark Specification Form (20P4B for M35053-XXXSP, 20P2Q-A for M35053-XXXFP) and attach to the Mask ROM Order Confirmation Form. ....... No writing is required.
Issuance signature
Company name
TEL
Approval Verification Framing
37
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
GZZ-SH00-51B <69A0>
Mask ROM number
g1. Test patterns # # # # # # # #
(The patterns with the mark "#" are test patterns)
g2. Character patterns
(See the next page)
38
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
0016
0116
0216
0316
0416
0516
0616
0716
0816
0916
0A16
0B16
0C16
0D16
0E16
0F16
1016
1116
1216
1316
1416
1516
1616
1716
1816
1916
1A16
1B16
1C16
1D16
1E16
1F16
2016
2116
2216
2316
2416
2516
2616
2716
2816
2916
2A16
2B16
2C16
2D16
2E16
2F16
3016
3116
3216
3316
3416
3516
3616
3716
3816
3916
3A16
3B16
3C16
3D16
3E16
3F16
39
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
4016
4116
4216
4316
4416
4516
4616
4716
4816
4916
4A16
4B16
4C16
4D16
4E16
4F16
5016
5116
5216
5316
5416
5516
5616
5716
5816
5916
5A16
5B16
5C16
5D16
5E16
5F16
6016
6116
6216
6316
6416
6516
6616
6716
6816
6916
6A16
6B16
6C16
6D16
6E16
6F16
7016
7116
7216
7316
7416
7516
7616
7716
7816
7916
7A16
7B16
7C16
7D16
7E16
7F16
40
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
8016
8116
8216
8316
8416
8516
8616
8716
8816
8916
8A16
8B16
8C16
8D16
8E16
8F16
9016
9116
9216
9316
9416
9516
9616
9716
9816
9916
9A16
9B16
9C16
9D16
9E16
9F16
A016
A116
A216
A316
A416
A516
A616
A716
A816
A916
AA16
AB16
AC16
AD16
AE16
AF16
B016
B116
B216
B316
B416
B516
B616
B716
B816
B916
BA16
BB16
BC16
BD16
BE16
BF16
41
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
C016
C116
C216
C316
C416
C516
C616
C716
C816
C916
CA16
CB16
CC16
CD16
CE16
CF16
D016
D116
D216
D316
D416
D516
D616
D716
D816
D916
DA16
DB16
DC16
DD16
DE16
DF16
E016
E116
E216
E316
E416
E516
E616
E716
E816
E916
EA16
EB16
EC16
ED16
EE16
EF16
F016
F116
F216
F316
F416
F516
F616
F716
F816
F916
FA16
FB16
FC16
FD16
FE16
FF16
blank
42
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
20P2Q-A (20-PIN SHRINK SOP) MARK SPECIFICATION FORM
43
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
20P4B (20-PIN DIP) MARK SPECIFICATION FORM
44
MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PACKAGE OUTLINE
20P4B
20P2Q-A
45
Keep safety first in your circuit designs!
* Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
* * * These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. All information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.
*
* *
*
(c) 1997 MITSUBISHI ELECTRIC CORP. New publication, effective Nov. 1997. Specifications subject to change without notice.
REVISION DESCRIPTION LIST
Rev. No. 1.0 First Edition
M35053-XXXSP/FP DATA SHEET
Revision Description Rev. date 971130
(1/1)


▲Up To Search▲   

 
Price & Availability of M35053-XXXFP

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X